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ddcprobe-3.0/000075500000000000000000000000001213362037500131365ustar00rootroot00000000000000ddcprobe-3.0/COPYING000064400000000000000000000612631213362037500142010ustar00rootroot00000000000000
GNU LIBRARY GENERAL PUBLIC LICENSE
Version 2, June 1991

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675 Mass Ave, Cambridge, MA 02139, USA
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That's all there is to it!

ddcprobe-3.0/Makefile000064400000000000000000000005641213362037500146030ustar00rootroot00000000000000PREFIX = /usr
SBINDIR = $(PREFIX)/sbin

TARGETS = cvt ddcprobe

CFLAGS = -W -Wall -O2 -fPIC -I. $(EXTRA_CFLAGS)

all: $(TARGETS)

cvt: LDLIBS += -lm
ddcprobe: LDLIBS += -lx86
ddcprobe.o: edid.h vesamode.h

ddcprobe: $(OBJS)
ddcprobe: vesamode.o

clean:
$(RM) $(TARGETS) *.a *.o *~
cleandist: clean

install: all
install -pD -m755 ddcprobe $(DESTDIR)$(SBINDIR)/ddcprobe
ddcprobe-3.0/README000064400000000000000000000014131213362037500140150ustar00rootroot00000000000000EDID (Extended Display Identification Data) is a VESA standard data format
that contains information about a monitor and its capabilities.

The information is stored in the monitor and is used to communicate with the
system through a Display Data Channel (DDC), which sites between the monitor
and the PC graphics adapter.

Inspired from:
- read-edid
- RedHat kudzu ddcprobe
- SuSE hwinfo

int10 and x86emu support by Gwenole Beauchesne <gbeauchesne@mandrakesoft.com>
(partly from Xorg code)

re-organised by Pixel <pixel@mandrakesoft.com>

re-organised by slazav@altlinux.org (use libx86)
--------------------------------------------------------------------------------
monitor-probe-using-X inspiration is Ubuntu's xresprobe,
many thanks to Daniel Stone and Fabio M. Di Nitto.
ddcprobe-3.0/cvt.c000064400000000000000000000424341213362037500141050ustar00rootroot00000000000000/* cvt.c Generate mode timings using the CVT Standard
*
* gcc gtf.c -o gtf -lm -Wall
*
* Copyright (c) 2001, Andy Ritger aritger@nvidia.com
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* o Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* o Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer
* in the documentation and/or other materials provided with the
* distribution.
* o Neither the name of NVIDIA nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT
* NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*
*
* This program is based on the VESA Coordinated Video Timing(CVT TM)
*
* The CVT EXCEL(TM) SPREADSHEET, a sample
* implementation of the CVT Standard, is available at:
*
* http://www.vesa.org/Public/CVT/CVTd6r1.xls
*
*
*
* This program takes a desired resolution and vertical refresh rate,
* and computes mode timings according to the CVT Standard.
* These mode timings can then be formatted as an XServer modeline
* or a mode description for use by fbset(8).
*
*
*
* NOTES:
*
* The CVT allows for computation of "margins" (the visible border
* surrounding the addressable video); on most non-overscan type
* systems, the margin period is zero. I've implemented the margin
* computations but not enabled it because 1) I don't really have
* any experience with this, and 2) neither XServer modelines nor
* fbset fb.modes provide an obvious way for margin timings to be
* included in their mode descriptions (needs more investigation).
*
* The CVT provides for computation of interlaced mode timings;
* I've implemented the computations but not enabled them, yet.
* I should probably enable and test this at some point.
*
*/

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <math.h>

#ifndef __XSERVERNAME__
#define __XSERVERNAME__ "Xorg"
#endif
#define max(a, b) ((a) > (b) ? (a) : (b))

#ifdef DEBUG
#define debug_printf(s) printf s
#else
#define debug_printf(s)
#endif


#define K93 1.8
#define CELL_GRAN 8.0 /* assumed character cell granularity */

#define K104 8

#define K110 550.0
#define MIN_V_BPORCH 6
#define MIN_V_PORCH 3 /* width of vsync in lines */

#define GTF_M_VAR 600.0 /* blanking formula gradient */
#define GTF_C_VAR 40.0 /* blanking formula offset */
#define GTF_K_VAR 128.0 /* blanking formula scaling factor */
#define GTF_J_VAR 20.0 /* blanking formula scaling factor */


#define C_PRIME (((GTF_C_VAR - GTF_J_VAR) * GTF_K_VAR/256.0) + GTF_J_VAR)
#define M_PRIME (GTF_K_VAR/256.0 * GTF_M_VAR)

/* C' and M' are part of the Blanking Duty Cycle computation */

/* reduced blanking vars */
#define K130 160
#define K131 32
#define K133 460
#define RB_V_FPORCH 3
#define RB_MIN_V_FPORCH 6

#define CLOCK_STEP 0.25


#define CELL_GRAN_RND floor(CELL_GRAN)
#define MARGIN_PER K93
#define MIN_V_PORCH_RND floor(MIN_V_PORCH)

#define MIN_VSYNC_BP K110
#define H_SYNC_PER K104

#define RB_MIN_V_BLANK K133
#define RB_H_SYNC K131
#define RB_H_BLANK K130
#define Y19 RB_H_SYNC
#define Y20 RB_H_BLANK

/* struct definitions */

typedef struct __mode
{
int hr, hss, hse, hfl;
int vr, vss, vse, vfl;
float pclk, h_freq, v_freq;
int reduced_blanking;
} mode;


typedef struct __options
{
int x, y;
int xorgmode, fbmode, reduced_blanking;
float v_freq;
} options;




/* prototypes */

void print_value(int n, char *name, float val);
void print_xf86_mode (mode *m);
void print_fb_mode (mode *m);
options *parse_command_line (int argc, char *argv[]);

const char *aspect_ratio(int width, int height, int *vsync_width)
{
struct {
float val;
const char *name;
int vsync_width;
} ratios[] = {
{ 4./ 3, "4:3", 4 },
{ 16./ 9, "16:9", 5 },
{ 16./10, "16:10", 6 },
{ 5./ 4, "5:4", 7 },
{ 15./ 9, "15:9", 7 },
{ 0, "", 10 },
};
int i;
for (i = 0; ratios[i].val; i++)
if (width == CELL_GRAN_RND * floor(height * ratios[i].val / CELL_GRAN_RND))
break;

if (vsync_width) *vsync_width = ratios[i].vsync_width;
return ratios[i].name;
}

/*
* print_value() - print the result of the named computation; this is
* useful when comparing against the CVT EXCEL spreadsheet.
*/

int global_verbose = 0;

void print_value(int n, char *name, float val)
{
if (global_verbose) {
printf("%2d: %-27s: %15f\n", n, name, val);
}
}



/* print_xf86_mode() - print the XServer modeline, given mode timings. */

void print_xf86_mode (mode *m)
{
printf ("\n");
printf (" # %dx%d @ %.2f Hz (CVT%s) hsync: %.2f kHz; pclk: %.2f MHz\n",
m->hr, m->vr, m->v_freq,
m->reduced_blanking ? " - Reduced Blanking" : "",
m->h_freq, m->pclk);

printf (" Modeline \"%dx%d_%.2f\" %.2f"
" %d %d %d %d"
" %d %d %d %d"
" -HSync +Vsync\n\n",
m->hr, m->vr, m->v_freq, m->pclk,
m->hr, m->hss, m->hse, m->hfl,
m->vr, m->vss, m->vse, m->vfl);

}



/*
* print_fb_mode() - print a mode description in fbset(8) format;
* see the fb.modes(8) manpage. The timing description used in
* this is rather odd; they use "left and right margin" to refer
* to the portion of the hblank before and after the sync pulse
* by conceptually wrapping the portion of the blank after the pulse
* to infront of the visible region; ie:
*
*
* Timing description I'm accustomed to:
*
*
*
* <--------1--------> <--2--> <--3--> <--4-->
* _________
* |-------------------|_______| |_______
*
* R SS SE FL
*
* 1: visible image
* 2: blank before sync (aka front porch)
* 3: sync pulse
* 4: blank after sync (aka back porch)
* R: Resolution
* SS: Sync Start
* SE: Sync End
* FL: Frame Length
*
*
* But the fb.modes format is:
*
*
* <--4--> <--------1--------> <--2--> <--3-->
* _________
* _______|-------------------|_______| |
*
* The fb.modes(8) manpage refers to <4> and <2> as the left and
* right "margin" (as well as upper and lower margin in the vertical
* direction) -- note that this has nothing to do with the term
* "margin" used in the CVT Standard.
*
* XXX always prints the 32 bit mode -- should I provide a command
* line option to specify the bpp? It's simple enough for a user
* to edit the mode description after it's generated.
*/

void print_fb_mode (mode *m)
{
printf ("\n");
printf ("mode \"%dx%d %.2fHz 32bit (CVT%s)\"\n",
m->hr, m->vr, m->v_freq,
m->reduced_blanking ? " - Reduced Blanking" : ""
);
printf (" # PCLK: %.2f MHz, H: %.2f kHz, V: %.2f Hz\n",
m->pclk, m->h_freq, m->v_freq);
printf (" geometry %d %d %d %d 32\n",
m->hr, m->vr, m->hr, m->vr);
printf (" timings %d %d %d %d %d %d %d\n",
(int) floor(1000000.0/m->pclk),/* pixclock in picoseconds */
m->hfl - m->hse, /* left margin (in pixels) */
m->hss - m->hr, /* right margin (in pixels) */
m->vfl - m->vse, /* upper margin (in pixel lines) */
m->vss - m->vr, /* lower margin (in pixel lines) */
m->hse - m->hss, /* horizontal sync length (pixels) */
m->vse - m->vss); /* vert sync length (pixel lines) */
printf (" hsync low\n");
printf (" vsync high\n");
printf ("endmode\n\n");

}




/*
* vert_refresh() - as defined by the CVT Standard, compute the
* Stage 1 Parameters using the vertical refresh frequency. In other
* words: input a desired resolution and desired refresh rate, and
* output the CVT mode timings.
*
* XXX All the code is in place to compute interlaced modes, but I don't
* feel like testing it right now.
*
* XXX margin computations are implemented but not tested (nor used by
* XServer of fbset mode descriptions, from what I can tell).
*/

mode vert_refresh(int H_PIXELS, int V_LINES, float IP_FREQ_RQD, int RED_BLANK_RQD, int INT_RQD, int MARGINS_RQD)
{
/* 1 */
float V_FIELD_RATE_RQD = INT_RQD ? IP_FREQ_RQD * 2 : IP_FREQ_RQD;

/* 2 */
int H_PIXELS_RND = floor((float) H_PIXELS / CELL_GRAN_RND) * CELL_GRAN_RND;
int F39 = H_PIXELS_RND;

/* 3 */
int LEFT_MARGIN = MARGINS_RQD ? floor(H_PIXELS_RND * MARGIN_PER / 100 / CELL_GRAN_RND) * CELL_GRAN_RND : 0;
int RIGHT_MARGIN = LEFT_MARGIN;

/* 4 */
int TOTAL_ACTIVE_PIXELS = H_PIXELS_RND + LEFT_MARGIN + RIGHT_MARGIN;

debug_printf(("4: %d\n", TOTAL_ACTIVE_PIXELS));

/* 5 */
int V_LINES_RND = floor(INT_RQD ? V_LINES / 2 : V_LINES);
int F40 = V_LINES;

int V_SYNC;
/*const char *ASPECT_RATIO =*/ aspect_ratio(F39, F40, &V_SYNC);
int V_SYNC_RND = V_SYNC;
/*int Q76 = V_SYNC_RND;*/

debug_printf(("5: %d %d\n", V_LINES_RND, V_SYNC));

/* 6 */
int TOP_MARGIN = MARGINS_RQD ? floor(MARGIN_PER / 100 * V_LINES_RND) : 0;
int BOT_MARGIN = TOP_MARGIN;

debug_printf(("6: %d\n", TOP_MARGIN));

/* 7 */
float INTERLACE = INT_RQD ? 0.5 : 0;

/* 8 */
float U23 = (1. / V_FIELD_RATE_RQD - MIN_VSYNC_BP / 1000000.)
/ (V_LINES_RND + 2 * TOP_MARGIN + MIN_V_PORCH_RND + INTERLACE)
* 1000000;

float Y23 = (1000000 / V_FIELD_RATE_RQD - RB_MIN_V_BLANK) / (V_LINES_RND + TOP_MARGIN + BOT_MARGIN);

float H_PERIOD_EST = RED_BLANK_RQD ? Y23 : U23;

debug_printf(("8: %f %f %f\n", U23, Y23, H_PERIOD_EST));

/* 9 */
int U26 = floor(MIN_VSYNC_BP / H_PERIOD_EST) + 1;
/*float U27 = MIN_VSYNC_BP / H_PERIOD_EST;*/
int V_SYNC_BP = U26 < V_SYNC + MIN_V_BPORCH ? V_SYNC + MIN_V_BPORCH : U26;

debug_printf(("9: %d %d\n", U26, V_SYNC_BP));

/* 9' */
int VBI_LINES = floor(RB_MIN_V_BLANK / H_PERIOD_EST) + 1;
/*float Y27 = RB_MIN_V_BLANK / H_PERIOD_EST;*/

debug_printf(("9': %d\n", VBI_LINES));

/* 10 */
/*int U31 = V_SYNC_BP - V_SYNC_RND;*/

/* 10' */
int RB_MIN_VBI = RB_V_FPORCH + V_SYNC_RND + MIN_V_BPORCH;
int ACT_VBI_LINES = VBI_LINES < RB_MIN_VBI ? RB_MIN_VBI : VBI_LINES;

debug_printf(("10': %d %d\n", RB_MIN_VBI, ACT_VBI_LINES));

/* 11 */
int U34 = V_LINES_RND + TOP_MARGIN + BOT_MARGIN + V_SYNC_BP + INTERLACE + MIN_V_PORCH_RND;

debug_printf(("11: %d\n", U34));

/* 11' */
int Y34 = ACT_VBI_LINES + V_LINES_RND + TOP_MARGIN + BOT_MARGIN + INTERLACE;
int TOTAL_V_LINES = RED_BLANK_RQD ? Y34 : U34;

debug_printf(("11': %d %d\n", Y34, TOTAL_V_LINES));

/* 12 */
float H_PERIOD = C_PRIME - M_PRIME*H_PERIOD_EST/1000;
float IDEAL_DUTY_CYCLE = H_PERIOD;

debug_printf(("12: %f %f\n", H_PERIOD, IDEAL_DUTY_CYCLE));

/* 13 */
float cycle = max(IDEAL_DUTY_CYCLE, 20);
int V_FIELD_RATE = floor(TOTAL_ACTIVE_PIXELS * cycle / (100 - cycle) / 2 / CELL_GRAN_RND) * 2 * CELL_GRAN_RND;
int U40 = V_FIELD_RATE;

debug_printf(("13: %f %d\n", cycle, V_FIELD_RATE));

int H_BLANK = RED_BLANK_RQD ? Y20 : U40;

/* 14 */
int V_FRAME_RATE = TOTAL_ACTIVE_PIXELS + H_BLANK;
int U43 = V_FRAME_RATE;

debug_printf(("14: %d %d\n", V_FRAME_RATE, U43));

/* 12' */
int Y37 = RB_H_BLANK + TOTAL_ACTIVE_PIXELS;
int TOTAL_PIXELS = RED_BLANK_RQD ? Y37 : U43;

debug_printf(("12': %d %d\n", Y37, TOTAL_PIXELS));

/* 15 */
float PIXEL_FREQ = CLOCK_STEP * floor(TOTAL_PIXELS / H_PERIOD_EST / CLOCK_STEP);
float U46 = PIXEL_FREQ;
/*float U47 = TOTAL_PIXELS / H_PERIOD_EST;*/

/* 13' */
float Y41 = V_FIELD_RATE_RQD * TOTAL_V_LINES * TOTAL_PIXELS / 1000000;
float Y40 = CLOCK_STEP * floor(Y41 / CLOCK_STEP);
float ACT_PIXEL_FREQ = RED_BLANK_RQD ? Y40 : U46;

/* 16 */
float U50 = 1000 * ACT_PIXEL_FREQ / TOTAL_PIXELS;

/* 14' */
float Y44 = 1000 * ACT_PIXEL_FREQ / TOTAL_PIXELS;
float ACT_H_FREQ = RED_BLANK_RQD ? Y44 : U50;

/* 17 */
float U53 = 1000 * ACT_H_FREQ / TOTAL_V_LINES;

/* 15' */
float Y47 = 1000 * ACT_H_FREQ / TOTAL_V_LINES;
float ACT_FIELD_RATE = RED_BLANK_RQD ? Y47 : U53;

/* 18 */
float U56 = INT_RQD ? ACT_FIELD_RATE / 2 : ACT_FIELD_RATE;

/* 16' */
float Y50 = INT_RQD ? ACT_FIELD_RATE / 2 : ACT_FIELD_RATE;


/* results */
float ACT_FRAME_RATE = RED_BLANK_RQD ? Y50 : U56;
float H_BACK_PORCH = H_BLANK / 2;
float H_SYNC_RND = RED_BLANK_RQD ? Y19 : floor(H_SYNC_PER / 100. * TOTAL_PIXELS / CELL_GRAN_RND) * CELL_GRAN_RND;
float H_FRONT_PORCH = H_BLANK - H_BACK_PORCH - H_SYNC_RND;
/*float V_BLANK = RED_BLANK_RQD ? ACT_VBI_LINES : V_SYNC_BP + MIN_V_PORCH_RND;*/
float V_FRONT_PORCH = RED_BLANK_RQD ? RB_V_FPORCH : MIN_V_PORCH_RND;
/*float V_BACK_PORCH = V_BLANK - V_FRONT_PORCH - Q76;*/

debug_printf(("H_BLANK %d\n", H_BLANK));
debug_printf(("H_BACK_PORCH %f\n", H_BACK_PORCH));
debug_printf(("H_SYNC_RND %f\n", H_SYNC_RND));
debug_printf(("H_FRONT_PORCH %f\n", H_FRONT_PORCH));

/* finally, pack the results in the mode struct */
mode m;

m.hr = (int) (H_PIXELS_RND);
m.hss = (int) (H_PIXELS_RND + H_FRONT_PORCH);
m.hse = (int) (H_PIXELS_RND + H_FRONT_PORCH + H_SYNC_RND);
m.hfl = (int) (TOTAL_PIXELS);

m.vr = (int) (V_LINES_RND);
m.vss = (int) (V_LINES_RND + V_FRONT_PORCH + INTERLACE);
m.vse = (int) (V_LINES_RND + V_FRONT_PORCH + INTERLACE + V_SYNC_RND);
m.vfl = (int) (TOTAL_V_LINES);

m.pclk = ACT_PIXEL_FREQ;
m.h_freq = ACT_H_FREQ;
m.v_freq = ACT_FRAME_RATE;

m.reduced_blanking = RED_BLANK_RQD;

return (m);

}




/*
* parse_command_line() - parse the command line and return an
* alloced structure containing the results. On error print usage
* and return NULL.
*/

options *parse_command_line (int argc, char *argv[])
{
int n;

options *o = (options *) calloc (1, sizeof (options));

if (argc < 4) goto bad_option;

o->x = atoi (argv[1]);
o->y = atoi (argv[2]);
o->v_freq = atof (argv[3]);

/* XXX should check for errors in the above */

n = 4;

while (n < argc) {
if ((strcmp (argv[n], "-v") == 0) ||
(strcmp (argv[n], "--verbose") == 0)) {
global_verbose = 1;
} else if ((strcmp (argv[n], "--reduced-blanking") == 0)) {
o->reduced_blanking = 1;
} else if ((strcmp (argv[n], "-f") == 0) ||
(strcmp (argv[n], "--fbmode") == 0)) {
o->fbmode = 1;
} else if ((strcmp (argv[n], "-x") == 0) ||
(strcmp (argv[n], "--xorgmode") == 0) ||
(strcmp (argv[n], "--xf86mode") == 0)) {
o->xorgmode = 1;
} else {
goto bad_option;
}

n++;
}

/* if neither xorgmode nor fbmode were requested, default to
xorgmode */

if (!o->fbmode && !o->xorgmode) o->xorgmode = 1;

return (o);

bad_option:

fprintf (stderr, "\n");
fprintf (stderr, "usage: %s x y refresh [-v|--verbose] "
"[--reduced-blanking] [-f|--fbmode] [-x|--xorgmode]\n", argv[0]);

fprintf (stderr, "\n");

fprintf (stderr, " x : the desired horizontal "
"resolution (required)\n");
fprintf (stderr, " y : the desired vertical "
"resolution (required)\n");
fprintf (stderr, " refresh : the desired refresh "
"rate (required)\n");
fprintf (stderr, " -v|--verbose : enable verbose printouts "
"(traces each step of the computation)\n");
fprintf (stderr, " --reduced-blanking : if you want reduced blanking\n");
fprintf (stderr, " -f|--fbmode : output an fbset(8)-style mode "
"description\n");
fprintf (stderr, " -x|--xorgmode : output an "__XSERVERNAME__"-style mode "
"description (this is the default\n"
" if no mode description is requested)\n");

fprintf (stderr, "\n");

free (o);
return (NULL);

}



int main (int argc, char *argv[])
{
mode m;
options *o;

o = parse_command_line (argc, argv);
if (!o) exit (1);

m = vert_refresh (o->x, o->y, o->v_freq, o->reduced_blanking, 0, 0);

if (o->xorgmode)
print_xf86_mode(&m);

if (o->fbmode)
print_fb_mode(&m);

return 0;

}
ddcprobe-3.0/ddcprobe.c000064400000000000000000000443711213362037500150750ustar00rootroot00000000000000#include <sys/io.h>
#include <stdarg.h>
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <ctype.h>
#include <unistd.h>
#include <libx86.h>
#include <netinet/in.h>
#include "vesamode.h"
#include "edid.h"


void fatal(char *format, ...) __attribute__ ((format (printf, 1, 2)));
void fatal(char *format, ...){
va_list args;
va_start(args, format);
vfprintf(stderr, format, args);
va_end(args);
exit(1);
}
void warning(char *format, ...) __attribute__ ((format (printf, 1, 2)));
void warning(char *format, ...){
va_list args;
va_start(args, format);
vfprintf(stderr, format, args);
va_end(args);
}

/* Create a 'canonical' version of a string,
* i.e. no spaces at start and end.
*/
static char *canon_str(char *s){
char *start, *end;

int len = strlen(s);
for (start = s; start < s + len; start++) if (!isspace(*start)) break;

for (end = s+len-1; end >= start; --end) {
if (!isspace(*end)) break;
*end = '\0';
}
return start;
}

void *segofs2addr(uint8_t segofs[4]){
uintptr_t ret=segofs[0] + (segofs[1] << 8) + (segofs[2] << 4)+ (segofs[3] << 12);
return (void *)ret;
}

// get string pointed by str_ptr address with range checking
char *get_string(char *OemData, uint8_t str_ptr[4]){
// String must be either in 0xC0000-0x100000 range (values comes from the original ddcprobe),
// or in OemData[256] block. Recommended string size is < 256b
char buf[1024], *p=(char *)segofs2addr(str_ptr);

unsigned int i;
for (i=0; i<sizeof(buf); i++){
if (((p<OemData) || (p>=OemData+256)) &&
((p<(char *)0xC0000) || (p>=(char *)0x100000))){
warning("VBE: warning: range check error for string\n");
break;
}
if (*p == '\0') break;
buf[i]=*p; p++;
}
buf[i]='\0';
return strdup(canon_str(buf));
}

// do range checking, get pointer to modes array
uint16_t *get_modes(char *ReservedData, uint8_t str_ptr[4]){
// Modes must be either in 0xC0000-0x100000 range (values comes from the original ddcprobe),
// or in ReservedData[222] block.
// Each mode number occupies one word (16 bits).
// The list of mode numbers is terminated by a -1 (0FFFFh).
uint16_t *ret=segofs2addr(str_ptr), *p;

for (p=ret; *p!=0xFFFF; p++){
if (((p<(uint16_t *)ReservedData) || (p>=(uint16_t *)(ReservedData+222))) &&
((p<(uint16_t *)0xC0000) || (p>=(uint16_t *)0x100000))){
warning("VBE: warning: range check error for modes\n");
return NULL;
}
}
return ret;
}

char *snip(char *string){
int i;
/* This is always a 13 character buffer */
/* and it's not always terminated. */
string[12] = '\0';

while(((i = strlen(string)) > 0) &&
(isspace(string[i - 1]) ||
(string[i - 1] == '\n') ||
(string[i - 1] == '\r'))) {
string[i - 1] = '\0';
}
return string;
}


/*********************************************************************/
void print_vbe_info(){ // Print VBE Controller Information
/* See VESA BIOS Extensions (VBE) Core Functions Standard, v.3.0, p.25 */

int i,j,k, s;
struct LRMI_regs regs;

struct VbeInfoBlock_t{
char VbeSignature[4]; // VBE Signature, "VESA"
uint16_t VbeVersion; // VBE Version, 0x0300
uint8_t OemStringPtr[4]; // VbeFarPtr to OEM String
uint32_t Capabilities; // Capabilities of graphics controller
uint8_t VideoModePtr[4]; // VbeFarPtr to VideoModeList
uint16_t TotalMemory; // Number of 64kb memory blocks, Added for VBE 2.0+
uint16_t OemSoftwareRev; // VBE implementation Software revision
uint8_t OemVendorNamePtr[4]; // VbeFarPtr to Vendor Name String
uint8_t OemProductNamePtr[4]; // VbeFarPtr to Product Name String
uint8_t OemProductRevPtr[4]; // VbeFarPtr to Product Revision String
char Reserved[222]; // Reserved for VBE implementation scratch area
char OemData[256]; // Data Area for OEM Strings
} __attribute__((packed)) * VbeInfoBlock;

// Getting VbeInfoBlock!
s=sizeof(struct VbeInfoBlock_t);
if (s != 512) fatal("VBE: VbeInfoBlock struct has wrong size: %d\n", s);

VbeInfoBlock = (struct VbeInfoBlock_t *)LRMI_alloc_real(s);
if (VbeInfoBlock == NULL) fatal("VBE: could allocate real memory\n");
if (((uintptr_t)VbeInfoBlock) >> 20) fatal("VBE: invalid LRMI pointer\n");

memset(VbeInfoBlock, 0, s);

// set up registers for the interrupt call
// Int 10, function 0x00 -- Return VBE Controller Information.
// On input AX=0x4F00, ES:DI - pointer to 512-byte buffer.
// first 4 bytes should be set to "VBE2"!
memset(&regs, 0, sizeof(regs));
regs.eax = 0x4f00;
regs.es = ((uintptr_t)VbeInfoBlock) >> 4;
regs.edi = ((uintptr_t)VbeInfoBlock) & 0x0F;
memcpy(VbeInfoBlock->VbeSignature, "VBE2", 4);

// do it
iopl(3);
ioperm(0, 0x400, 1);
if (LRMI_int(0x10, &regs) == 0) {
LRMI_free_real(VbeInfoBlock);
fatal("VBE: Error on LRMI_int\n");
}

// check for successful return code
i = regs.eax & 0xffff;
if (i != 0x4f) {
LRMI_free_real(VbeInfoBlock);
fatal("VBE: Error (0x4f00): 0x%04x\n", i);
}

// check for "VESA" string
if (memcmp(VbeInfoBlock->VbeSignature, "VESA", 4)){
LRMI_free_real(VbeInfoBlock);
fatal("VBE: Error in VbeSignature\n");
}

printf("vbe: %c%c%c%c %d.%d\n",
VbeInfoBlock->VbeSignature[0],
VbeInfoBlock->VbeSignature[1],
VbeInfoBlock->VbeSignature[2],
VbeInfoBlock->VbeSignature[3],
VbeInfoBlock->VbeVersion >>8,
VbeInfoBlock->VbeVersion &0xFF);

printf("oem: %s\n",
get_string(VbeInfoBlock->OemData, VbeInfoBlock->OemStringPtr));
if ((VbeInfoBlock->VbeVersion >> 8) >= 3){
printf("vendor: %s\n",
get_string(VbeInfoBlock->OemData, VbeInfoBlock->OemVendorNamePtr));
printf("product: %s %s\n",
get_string(VbeInfoBlock->OemData, VbeInfoBlock->OemProductNamePtr),
get_string(VbeInfoBlock->OemData, VbeInfoBlock->OemProductRevPtr));
}


printf("memory: %dkb\n", VbeInfoBlock->TotalMemory << 6);

uint16_t *modes=get_modes(VbeInfoBlock->Reserved, VbeInfoBlock->VideoModePtr);

// List supported standard modes
for (i=0; i<4; i++) {
switch (i) {
case 0: printf("8bit:"); break;
case 1: printf("16bit:"); break;
case 2: printf("24bit:"); break;
case 3: printf("32bit:"); break;
}
if (modes != NULL){
for(j=0; modes[j] != 0xffff; j++) {
for(k = 0; known_vesa_modes[k].x != 0; k++) {
if (known_vesa_modes[k].number == modes[j]) {
u_int32_t colors = known_vesa_modes[k].colors-1;
if ((colors == 0x0000ff && i == 0) ||
(colors == 0x007fff && i == 1) ||
(colors == 0x00ffff && i == 2) ||
(colors == 0xffffff && i == 3)) {
printf(" %dx%d", known_vesa_modes[k].x, known_vesa_modes[k].y);
}
}
}
}
}
printf("\n");
}

LRMI_free_real(VbeInfoBlock);
}

/*********************************************************************/
void print_vbe_mode(){ // Print current VBE mode
/* See VESA BIOS Extensions (VBE) Core Functions Standard, v.3.0, p.25 */

int i;
struct LRMI_regs regs;

// set up registers for the interrupt call
// Int 10, function 0x03 -- Return Current VBE Mode
// On input AX=0x4F03
memset(&regs, 0, sizeof(regs));
regs.eax = 0x4f03;

// do it
iopl(3);
ioperm(0, 0x400, 1);
if (LRMI_int(0x10, &regs) == 0) fatal("VBE: Error on LRMI_int\n");

// check for successful return code
i = regs.eax & 0xffff;
if (i != 0x4f) fatal("VBE: Error (0x4f03): 0x%04x\n", i);

int mode=regs.ebx & 0x1FFF;

for(i = 0; known_vesa_modes[i].x != 0; i++) {
if (known_vesa_modes[i].number == mode) {
printf("current_mode: 0x%X %dx%d\n", mode, known_vesa_modes[i].x, known_vesa_modes[i].y);
printf("current_colors: %d\n", known_vesa_modes[i].colors-1);
}
}
}

/*********************************************************************/
void print_vbe_ddc_cap(){ // Print VBE/DDC capabilities
/* See VESA BIOS Extensions/Display Data Channel Standard, v.1.1 */

int i;
struct LRMI_regs regs;

// set up registers for the interrupt call
memset(&regs, 0, sizeof(regs));
regs.eax = 0x4f15;
regs.ebx = 0;
regs.es = 0;
regs.edi = 0;

// do it
iopl(3);
ioperm(0, 0x400, 1);
if (LRMI_int(0x10, &regs) == 0) fatal("VBE: Error on LRMI_int\n");

// check for successful return code
i = regs.eax & 0xffff;
if (i != 0x4f) fatal("VBE: Error (0x4f15): 0x%04x\n", i);

printf("ddc_transfer_time: %d s\n",
(regs.ebx >> 4) && 0xF);
printf("ddc_support:%s%s\n",
regs.ebx&1 ? " DDC1": "",
regs.ebx&2 ? " DDC2": "");
printf("ddc_screen_blanked: %s\n",
regs.ebx&3 ? "yes": "no");
}



/*********************************************************************/
void print_vbe_edid(){ // Print VBE Controller Information
/* See VESA BIOS Extensions/Display Data Channel Standard, v.1.1
for int10 function and
http://www.indopedia.org/Extended_display_identification_data.html
for edid data structure */
int i;
struct LRMI_regs regs;

uint8_t *edid;
const uint8_t edid_v1_header[] = { 0x00, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0x00 };
const int edid_size=128;

edid = (uint8_t *)LRMI_alloc_real(edid_size);
if (edid == NULL) fatal("VBE: could allocate real memory\n");
if (((uintptr_t)edid) >> 20) fatal("VBE: invalid LRMI pointer\n");

memset(edid, 0, edid_size);

// set up registers for the interrupt call
memset(&regs, 0, sizeof(regs));
regs.eax = 0x4f15; // VESA Extension // VBE/DDC Services
regs.ebx = 0x0001; // Read EDID
regs.ecx = 0x0000; // Controller unit number (00 = primary controller)
regs.edx = 0x0000; // EDID block numder
regs.es = ((uintptr_t)edid) >> 4;
regs.edi = ((uintptr_t)edid) & 0x0F;
// ES:DI -- Pointer to area in which the EDID block (128 bytes) shall be returned

// do it
iopl(3);
ioperm(0, 0x400, 1);
if (LRMI_int(0x10, &regs) == 0){
LRMI_free_real(edid);
fatal("VBE: Error on LRMI_int\n");
}

// check for successful return code
i = regs.eax & 0xffff;
if (i != 0x4f){
LRMI_free_real(edid);
fatal("VBE: Error (0x4f15): 0x%04x\n", i);
}

if (memcmp(edid, edid_v1_header, sizeof(edid_v1_header)))
warning("VBE: warning: bad EDIDv1 header\n");

uint8_t chksum=0;
for (i=0; i<edid_size; i++) chksum+=edid[i];

if (chksum != 0)
warning("VBE: warning: bad EDID checksum\n");

struct edid_info_t edid_struct;
if (sizeof(edid_struct) != edid_size)
fatal("VBE: EDID struct has wrong size: %zd\n", sizeof(edid_struct));

memcpy(&edid_struct, edid, edid_size);
LRMI_free_real(edid);

uint32_t ver=(edid_struct.version << 16) + edid_struct.revision;
printf("edid: %d %d\n",
edid_struct.version, edid_struct.revision);

uint16_t man = edid_struct.manufacturer_name[1] +
(edid_struct.manufacturer_name[0] << 8);

char manufacturer[4];
manufacturer[0] = ((man >> 10) & 0x1F) + 'A' - 1;
manufacturer[1] = ((man >> 5) & 0x1F) + 'A' - 1;
manufacturer[2] = (man & 0x1F) + 'A' - 1;
manufacturer[3] = '\0';

uint16_t code=edid_struct.product_code[0] +
(edid_struct.product_code[1] << 8);

printf("id: %04x\n", code);
printf("eisa: %s%04x\n", manufacturer, code);

if(edid_struct.serial_number != 0xffffffff) {
if(strcmp(manufacturer, "MAG") == 0) {
edid_struct.serial_number -= 0x7000000;
}
if(strcmp(manufacturer, "OQI") == 0) {
edid_struct.serial_number -= 456150000;
}
if(strcmp(manufacturer, "VSC") == 0) {
edid_struct.serial_number -= 640000000;
}
}
printf("serial: %08x\n", edid_struct.serial_number);

printf("manufacture: %d %d\n",
edid_struct.week, edid_struct.year + 1990);

printf("input: %s%s%s%s.\n",
edid_struct.video_input_definition.separate_sync ?
"separate sync, " : "",
edid_struct.video_input_definition.composite_sync ?
"composite sync, " : "",
edid_struct.video_input_definition.sync_on_green ?
"sync on green, " : "",
edid_struct.video_input_definition.digital ?
"digital signal" : "analog signal");

printf("screensize: %d %d\n",
edid_struct.max_size_horizontal,
edid_struct.max_size_vertical);

printf("gamma: %f\n", edid_struct.gamma / 100.0 + 1);

printf("dpms: %s, %s%s, %s%s, %s%s\n",
edid_struct.feature_support.rgb ? "RGB" : "non-RGB",
edid_struct.feature_support.active_off ? "" : "no ", "active off",
edid_struct.feature_support.suspend ? "" : "no ", "suspend",
edid_struct.feature_support.standby ? "" : "no ", "standby");

if(edid_struct.established_timings.timing_720x400_70)
printf("timing: 720x400@70 Hz (VGA 640x400, IBM)\n");
if(edid_struct.established_timings.timing_720x400_88)
printf("timing: 720x400@88 Hz (XGA2)\n");
if(edid_struct.established_timings.timing_640x480_60)
printf("timing: 640x480@60 Hz (VGA)\n");
if(edid_struct.established_timings.timing_640x480_67)
printf("timing: 640x480@67 Hz (Mac II, Apple)\n");
if(edid_struct.established_timings.timing_640x480_72)
printf("timing: 640x480@72 Hz (VESA)\n");
if(edid_struct.established_timings.timing_640x480_75)
printf("timing: 640x480@75 Hz (VESA)\n");
if(edid_struct.established_timings.timing_800x600_56)
printf("timing: 800x600@56 Hz (VESA)\n");
if(edid_struct.established_timings.timing_800x600_60)
printf("timing: 800x600@60 Hz (VESA)\n");
if(edid_struct.established_timings.timing_800x600_72)
printf("timing: 800x600@72 Hz (VESA)\n");
if(edid_struct.established_timings.timing_800x600_75)
printf("timing: 800x600@75 Hz (VESA)\n");
if(edid_struct.established_timings.timing_832x624_75)
printf("timing: 832x624@75 Hz (Mac II)\n");
if(edid_struct.established_timings.timing_1024x768_87i)
printf("timing: 1024x768@87 Hz Interlaced (8514A)\n");
if(edid_struct.established_timings.timing_1024x768_60)
printf("timing: 1024x768@60 Hz (VESA)\n");
if(edid_struct.established_timings.timing_1024x768_70)
printf("timing: 1024x768@70 Hz (VESA)\n");
if(edid_struct.established_timings.timing_1024x768_75)
printf("timing: 1024x768@75 Hz (VESA)\n");
if(edid_struct.established_timings.timing_1280x1024_75)
printf("timing: 1280x1024@75 (VESA)\n");

/* Standard timings.
xresolution: Horizontal resolution. Multiply by 8, then add 248 for actual value.
aspect: Aspect ratio. Actual vertical resolution depends on horizontal resolution.
00=16:10, 01=4:3, 10=5:4, 11=16:9 (00=1:1 prior to v1.3)
vfreq: Vertical frequency. Add 60 to get actual value.
*/
for(i = 0; i < 8; i++) {
uint16_t xres = edid_struct.standard_timing[i].xresolution;
uint16_t vfreq = edid_struct.standard_timing[i].vfreq;
uint16_t x = xres*8 + 248;
uint16_t y=x;

if (((xres != 0) && (xres != 1)) ||
((vfreq != 0) && (vfreq != 1))) {
switch(edid_struct.standard_timing[i].aspect) {
case 0:
if (ver >= (1 << 16) + 3) // v>=1.3
y=(10*x)/16;
else
y=x;
break;
case 1: y=(3*x)/4; break;
case 2: y=(4*x)/5; break;
case 3: y=(9*x)/16; break;
}
printf("ctiming: %dx%d@%d\n", x, y, vfreq +60);
}
}

/* Detailed timing information. */
/* The original dtiming code didn't actually work at all, so I've
* removed it and replaced it with my own dtiming code, which is derived
* from the VESA spec and parse-edid.c. How well it works on monitors
* with multiple dtimings is unknown, since I don't have one. -daniels */
struct edid_monitor_descriptor *monitor = NULL;
struct edid_detailed_timing *timing;
for(i = 0; i < 4; i++) {
timing = &edid_struct.monitor_details.detailed_timing[i];
if (!timing->pixel_clock) {
monitor = &edid_struct.monitor_details.monitor_descriptor[i];
if (monitor->type == edid_monitor_descriptor_serial)
printf("monitorserial: %s\n", snip(monitor->data.string));
else if (monitor->type == edid_monitor_descriptor_ascii)
printf("monitorid: %s\n", snip(monitor->data.string));
else if (monitor->type == edid_monitor_descriptor_name)
printf("monitorname: %s\n", snip(monitor->data.string));
else if (monitor->type == edid_monitor_descriptio_mf_range) {
printf("monitor_mf_range\n");
}
else if (monitor->type == edid_monitor_descriptor_range) {
// TODO: get more code from monitor-parse-edid
printf("horizsync: %d-%d\nvertrefresh: %d-%d\n",
monitor->data.range_data.horizontal_min,
monitor->data.range_data.horizontal_max,
monitor->data.range_data.vertical_min,
monitor->data.range_data.vertical_max);
}
}
else {
int h_active, h_blanking;
int v_active, v_blanking;
int hsync_offset, hsync_pulse_width;
int vsync_offset, vsync_pulse_width;
int pixclock;
int h_total, v_total, vfreq;
pixclock = EDID_DETAILED_TIMING_PIXEL_CLOCK(*timing);
h_blanking = EDID_DETAILED_TIMING_H_BLANKING(*timing);
v_blanking = EDID_DETAILED_TIMING_V_BLANKING(*timing);;
h_active = EDID_DETAILED_TIMING_H_ACTIVE(*timing);
v_active = EDID_DETAILED_TIMING_V_ACTIVE(*timing);
h_total = h_active + h_blanking;
v_total = v_active + v_blanking;
hsync_offset = EDID_DETAILED_TIMING_HSYNC_OFFSET(*timing);
vsync_offset = EDID_DETAILED_TIMING_VSYNC_OFFSET(*timing);
hsync_pulse_width = EDID_DETAILED_TIMING_HSYNC_PULSE_WIDTH(*timing);
vsync_pulse_width = EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH(*timing);
vfreq = (double)pixclock/((double)v_total*(double)h_total);
printf("modeline: \"%dx%d@%d\" %.2f %d %d %d %d %d %d %d %d %chsync %cvsync\n",
h_active, v_active, vfreq, (double)(pixclock/1000000.0),
h_active, h_active+hsync_offset, h_active+hsync_offset+hsync_pulse_width,
h_total,
v_active, v_active+vsync_offset, v_active+vsync_offset+vsync_pulse_width,
v_total,
((timing->flags.variant & 2) == 2 ? '+' : '-'),
((timing->flags.variant & 1) == 1 ? '+' : '-'));
}
}

}

/*********************************************************************/
int main(){

if (geteuid())
fatal("VBE: Permission denied\n");
if (LRMI_init() == 0)
fatal("VBE: could not initialize LRMI\n");

print_vbe_info();
//print_vbe_mode();
//print_vbe_ddc_cap();
print_vbe_edid();
return 0;
}
ddcprobe-3.0/edid.h000064400000000000000000000117101213362037500142140ustar00rootroot00000000000000#ifndef EDID_H
#define EDID_H

#include <stdint.h>

/* Aspect ratios used in EDID info. */
enum edid_aspect {
aspect_unknown = 0,
aspect_75,
aspect_8,
aspect_5625,
};

/* Detailed timing information used in EDID v1.x */
struct edid_detailed_timing {
u_int16_t pixel_clock;
#define EDID_DETAILED_TIMING_PIXEL_CLOCK(_x) \
((_x).pixel_clock * 10000)
unsigned char h_active;
unsigned char h_blanking;
unsigned char h_blanking_hi: 4;
unsigned char h_active_hi: 4;
#define EDID_DETAILED_TIMING_H_ACTIVE(_x) \
(((_x).h_active_hi << 8) + (_x).h_active)
#define EDID_DETAILED_TIMING_H_BLANKING(_x) \
(((_x).h_blanking_hi << 8) + (_x).h_blanking)
unsigned char v_active;
unsigned char v_blanking;
unsigned char v_blanking_hi: 4;
unsigned char v_active_hi: 4;
#define EDID_DETAILED_TIMING_V_ACTIVE(_x) \
(((_x).v_active_hi << 8) + (_x).v_active)
#define EDID_DETAILED_TIMING_V_BLANKING(_x) \
(((_x).v_blanking_hi << 8) + (_x).v_blanking)
unsigned char hsync_offset;
unsigned char hsync_pulse_width;
unsigned char vsync_offset: 4;
unsigned char vsync_pulse_width: 4;
unsigned char hsync_offset_hi: 2;
unsigned char hsync_pulse_width_hi: 2;
unsigned char vsync_offset_hi: 2;
unsigned char vsync_pulse_width_hi: 2;
#define EDID_DETAILED_TIMING_HSYNC_OFFSET(_x) \
(((_x).hsync_offset_hi << 8) + (_x).hsync_offset)
#define EDID_DETAILED_TIMING_HSYNC_PULSE_WIDTH(_x) \
(((_x).hsync_pulse_width_hi << 8) + (_x).hsync_pulse_width)
#define EDID_DETAILED_TIMING_VSYNC_OFFSET(_x) \
(((_x).vsync_offset_hi << 4) + (_x).vsync_offset)
#define EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH(_x) \
(((_x).vsync_pulse_width_hi << 4) + (_x).vsync_pulse_width)
unsigned char himage_size;
unsigned char vimage_size;
unsigned char himage_size_hi: 4;
unsigned char vimage_size_hi: 4;
#define EDID_DETAILED_TIMING_HIMAGE_SIZE(_x) \
(((_x).himage_size_hi << 8) + (_x).himage_size)
#define EDID_DETAILED_TIMING_VIMAGE_SIZE(_x) \
(((_x).vimage_size_hi << 8) + (_x).vimage_size)
unsigned char hborder;
unsigned char vborder;
struct {
unsigned char interlaced: 1;
unsigned char stereo: 2;
unsigned char digital_composite: 2;
unsigned char variant: 2;
unsigned char zero: 1;
} flags;
};

enum {
edid_monitor_descriptor_serial = 0xff,
edid_monitor_descriptor_ascii = 0xfe,
edid_monitor_descriptor_range = 0xfd,
edid_monitor_descriptor_name = 0xfc,
edid_monitor_descriptio_mf_range = 0xf,
} edid_monitor_descriptor_types;

struct edid_monitor_descriptor {
uint16_t zero_flag_1;
unsigned char zero_flag_2;
unsigned char type;
unsigned char zero_flag_3;
union {
char string[13];
struct {
unsigned char vertical_min;
unsigned char vertical_max;
unsigned char horizontal_min;
unsigned char horizontal_max;
unsigned char pixel_clock_max;
unsigned char gtf_data[8];
} range_data;
} data;
};

struct edid_info_t {
uint8_t header[8];
uint8_t manufacturer_name[2];
// First byte: 0-1 - second char LSBs, 2-6 - first char, 7 - zero
// Second byte: 0-4 - third char, 7-5 - second char MSBs
// chars is 5-bits
uint8_t product_code[2]; // LSB first
uint32_t serial_number;
unsigned char week;
unsigned char year;
unsigned char version;
unsigned char revision;
struct {
unsigned char digital: 1;
unsigned char separate_sync: 1;
unsigned char composite_sync: 1;
unsigned char sync_on_green: 1;
unsigned char unused: 2;
unsigned char voltage_level: 2;
} video_input_definition;
unsigned char max_size_horizontal;
unsigned char max_size_vertical;
unsigned char gamma;
struct {
unsigned char unused1: 3;
unsigned char rgb: 1;
unsigned char unused2: 1;
unsigned char active_off: 1;
unsigned char suspend: 1;
unsigned char standby: 1;
} feature_support;
unsigned char color_characteristics[10];
struct {
unsigned char timing_720x400_70: 1;
unsigned char timing_720x400_88: 1;
unsigned char timing_640x480_60: 1;
unsigned char timing_640x480_67: 1;
unsigned char timing_640x480_72: 1;
unsigned char timing_640x480_75: 1;
unsigned char timing_800x600_56: 1;
unsigned char timing_800x600_60: 1;
unsigned char timing_800x600_72: 1;
unsigned char timing_800x600_75: 1;
unsigned char timing_832x624_75: 1;
unsigned char timing_1024x768_87i: 1;
unsigned char timing_1024x768_60: 1;
unsigned char timing_1024x768_70: 1;
unsigned char timing_1024x768_75: 1;
unsigned char timing_1280x1024_75: 1;
} established_timings;
struct {
unsigned char timing_1152x870_75: 1;
unsigned char reserved: 7;
} manufacturer_timings;
struct {
uint16_t xresolution: 8; // Horizontal resolution. Multiply by 8, then add 248 for actual value
uint16_t vfreq: 6; // Vertical frequency. Add 60 to get actual value.
uint16_t aspect: 2; // 00=16:10, 01=4:3, 10=5:4, 11=16:9 (00=1:1 prior to v1.3)
} standard_timing[8];
union {
#if 0
unsigned char detailed_timing[72];
#else
struct edid_detailed_timing detailed_timing[4];
#endif
struct edid_monitor_descriptor monitor_descriptor[4];
} monitor_details;
unsigned char extension_flag;
unsigned char checksum;
};

#endif
ddcprobe-3.0/vesamode.c000064400000000000000000000132351213362037500151110ustar00rootroot00000000000000#include "vesamode.h"
#ident "$Id: vesamode.c,v 1.3 1999/07/22 04:53:06 nalin Exp $"

/* Known standard VESA modes. */
struct vesa_mode_t known_vesa_modes[] = {
/* VESA 1.0/1.1 ? */
{0x100, 640, 400, 256, "640x400x256", 0},
{0x101, 640, 480, 256, "640x480x256", 0},
{0x102, 800, 600, 16, "800x600x16", 0},
{0x103, 800, 600, 256, "800x600x256", 0},
{0x104, 1024, 768, 16, "1024x768x16", 0},
{0x105, 1024, 768, 256, "1024x768x256", 0},
{0x106, 1280, 1024, 16, "1280x1024x16", 0},
{0x107, 1280, 1024, 256,"1280x1024x256", 0},
{0x108, 80, 60, 16, "80x60 (text)", 0},
{0x109, 132, 25, 16, "132x25 (text)", 0},
{0x10a, 132, 43, 16, "132x43 (text)", 0},
{0x10b, 132, 50, 16, "132x50 (text)", 0},
{0x10c, 132, 60, 16, "132x60 (text)", 0},
/* VESA 1.2+ */
{0x10d, 320, 200, 32768, "320x200x32k", 0},
{0x10e, 320, 200, 65536, "320x200x64k", 0},
{0x10f, 320, 200, 16777216, "320x200x16m", 0},
{0x110, 640, 480, 32768, "640x480x32k", 0},
{0x111, 640, 480, 65536, "640x480x64k", 0},
{0x112, 640, 480, 16777216, "640x480x16m", 0},
{0x113, 800, 600, 32768, "800x600x32k", 0},
{0x114, 800, 600, 65536, "800x600x64k", 0},
{0x115, 800, 600, 16777216, "800x600x16m", 0},
{0x116, 1024, 768, 32768, "1024x768x32k", 0},
{0x117, 1024, 768, 65536, "1024x768x64k", 0},
{0x118, 1024, 768, 16777216, "1024x768x16m", 0},
{0x119, 1280, 1024, 32768, "1280x1024x32k", 0},
{0x11a, 1280, 1024, 65536, "1280x1024x64k", 0},
{0x11b, 1280, 1024, 16777216, "1280x1024x16m", 0},
/* VESA 2.0+ */
{0x120, 1600, 1200, 256, "1600x1200x256", 0},
{0x121, 1600, 1200, 32768, "1600x1200x32k", 0},
{0x122, 1600, 1200, 65536, "1600x1200x64k", 0},
{ 0, 0, 0, 0, "", 0},
};

struct vesa_timing_t known_vesa_timings[] = {
/* Source: VESA Monitor Timing Specifications 1.0 rev 0.8 */
{ 640, 350, 85, 31.500, { 640, 32, 64, 96, 350,32, 3, 60},
hsync_pos, vsync_neg, 37.861, 85.080},

{ 640, 400, 85, 31.500, { 640, 32, 64, 96, 400, 1, 3, 41},
hsync_neg, vsync_pos, 37.861, 85.080},

{ 720, 400, 85, 35.500, { 720, 36, 72, 108, 400, 1, 3, 42},
hsync_neg, vsync_pos, 37.861, 85.080},

{ 640, 480, 60, 25.175, { 640, 8, 96, 40, 480, 2, 2, 25},
hsync_neg, vsync_neg, 31.469, 59.940},
{ 640, 480, 72, 31.500, { 640, 16, 40, 120, 480, 1, 3, 20},
hsync_neg, vsync_neg, 37.861, 72.809},
{ 640, 480, 75, 31.500, { 640, 16, 64, 120, 480, 1, 3, 16},
hsync_neg, vsync_neg, 37.500, 75.000},
{ 640, 480, 85, 36.000, { 640, 56, 56, 80, 480, 1, 3, 25},
hsync_neg, vsync_neg, 43.269, 85.008},

{ 800, 600, 56, 36.000, { 800, 24, 72, 128, 600, 1, 2, 22},
hsync_pos, vsync_pos, 35.156, 56.250},
{ 800, 600, 60, 40.000, { 800, 40, 128, 88, 600, 1, 4, 23},
hsync_pos, vsync_pos, 37.879, 60.317},
{ 800, 600, 72, 50.000, { 800, 56, 120, 64, 600,37, 6, 23},
hsync_pos, vsync_pos, 48.077, 72.188},
{ 800, 600, 75, 49.500, { 800, 16, 80, 160, 600, 1, 3, 21},
hsync_pos, vsync_pos, 46.875, 75.000},
{ 800, 600, 85, 56.250, { 800, 32, 64, 152, 600, 1, 3, 27},
hsync_pos, vsync_pos, 53.674, 85.061},

{1024, 768, 43, 44.900, {1024, 8, 176, 56, 768, 0, 4, 20},
hsync_pos, vsync_pos, 35.522, 86.957},
{1024, 768, 60, 65.000, {1024, 24, 136, 160, 768, 3, 6, 29},
hsync_neg, vsync_neg, 48.363, 60.004},
{1024, 768, 70, 75.000, {1024, 24, 136, 144, 768, 3, 6, 29},
hsync_neg, vsync_neg, 56.476, 70.069},
{1024, 768, 75, 78.750, {1024, 16, 96, 176, 768, 1, 3, 28},
hsync_pos, vsync_pos, 60.023, 75.029},
{1024, 768, 85, 94.500, {1024, 48, 96, 208, 768, 1, 3, 36},
hsync_pos, vsync_pos, 68.677, 84.997},

{1152, 864, 70, 94.200, {1152, 32, 96, 192, 864, 1, 3, 46},
hsync_pos, vsync_pos, 0.000, 0.000},
{1152, 864, 75, 108.000, {1152, 64, 128, 256, 864, 1, 3, 32},
hsync_pos, vsync_pos, 67.500, 75.000},
{1152, 864, 85, 121.500, {1152, 64, 128, 224, 864, 1, 3, 43},
hsync_pos, vsync_pos, 0.000, 0.000},

{1280, 960, 60, 108.000, {1280, 96, 112, 312, 960, 1, 3, 36},
hsync_pos, vsync_pos, 60.000, 60.000},
{1280, 960, 85, 148.500, {1280, 64, 160, 224, 960, 1, 3, 47},
hsync_pos, vsync_pos, 85.398, 85.002},

{1280, 1024, 60, 108.000, {1280, 48, 112, 248, 1024, 1, 3, 38},
hsync_pos, vsync_pos, 63.981, 60.020},
{1280, 1024, 75, 135.000, {1280, 16, 144, 248, 1024, 1, 3, 38},
hsync_pos, vsync_pos, 79.976, 75.025},
{1280, 1024, 85, 157.500, {1280, 64, 160, 224, 1024, 1, 3, 44},
hsync_pos, vsync_pos, 91.146, 85.024},

{1600, 1200, 60, 162.000, {1600, 64, 192, 304, 1200, 1, 3, 46},
hsync_pos, vsync_pos, 75.000, 60.000},
{1600, 1200, 65, 175.500, {1600, 64, 192, 304, 1200, 1, 3, 46},
hsync_pos, vsync_pos, 81.250, 65.000},
{1600, 1200, 70, 189.000, {1600, 64, 192, 304, 1200, 1, 3, 46},
hsync_pos, vsync_pos, 87.500, 70.000},
{1600, 1200, 75, 202.500, {1600, 64, 192, 304, 1200, 1, 3, 46},
hsync_pos, vsync_pos, 93.750, 75.000},
{1600, 1200, 85, 229.500, {1600, 64, 192, 304, 1200, 1, 3, 46},
hsync_pos, vsync_pos, 106.250, 85.000},

{1792, 1344, 60, 204.750, {1792,128, 200, 328, 1344, 1, 3, 46},
hsync_neg, vsync_pos, 83.640, 60.000},
{1792, 1344, 75, 261.000, {1792, 96, 216, 352, 1344, 1, 3, 69},
hsync_neg, vsync_pos, 106.270, 74.997},

{1856, 1392, 60, 218.250, {1856, 96, 224, 352, 1392, 1, 3, 43},
hsync_neg, vsync_pos, 86.333, 59.995},
{1856, 1392, 75, 288.000, {1856,128, 224, 352, 1392, 1, 3,104},
hsync_neg, vsync_pos, 112.500, 75.000},

{1920, 1440, 60, 234.000, {1920,128, 208, 344, 1440, 1, 3, 56},
hsync_neg, vsync_pos, 90.000, 60.000},
{1920, 1440, 75, 297.000, {1920,144, 224, 352, 1440, 1, 3, 56},
hsync_neg, vsync_pos, 112.500, 75.000},

{ 0, 0, 0, 0.000, { 0, 0, 0, 0, 0, 0, 0, 0},
000000000, 000000000, 0.000, 0.000},
};
ddcprobe-3.0/vesamode.h000064400000000000000000000011671213362037500151170ustar00rootroot00000000000000#ifndef vesamode_h
#define vesamode_h
#include <sys/types.h>
#ident "$Id: vesamode.h,v 1.1 1999/08/24 01:08:47 nalin Exp $"

typedef enum { hsync_neg = 0, hsync_pos } hsync_t;
typedef enum { vsync_neg = 0, vsync_pos } vsync_t;

struct vesa_mode_t {
u_int16_t number;
u_int16_t x, y;
u_int32_t colors;
const char *text;
const char *modeline;
};

struct vesa_timing_t {
u_int16_t x, y;
float refresh;
float dotclock;
u_int16_t timings[8];
hsync_t hsync;
vsync_t vsync;
float hfreq;
float vfreq;
};

extern struct vesa_mode_t known_vesa_modes[];
extern struct vesa_timing_t known_vesa_timings[];

#endif /* vesamode_h */
 
design & coding: Vladimir Lettiev aka crux © 2004-2005, Andrew Avramenko aka liks © 2007-2008
current maintainer: Michael Shigorin