ALT Linux repos
S: | 4.0.0.2496.0-alt4 |
5.0: | 2.1.1.17910.0-alt6 |
4.1: | 2.1.1.17910.0-alt0.M41.5 |
4.0: | 2.1.1.17910.0-alt3.M40.4 |
+backports: | 2.1.1.17910.0-alt3.M40.1 |
Group :: Databases
RPM: firebird
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Patch: firebird-e2k.patch
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diff --git a/src/common/classes/FpeControl.h b/src/common/classes/FpeControl.h
index 5e03522e00..bebf48a2ff 100644
--- a/src/common/classes/FpeControl.h
+++ b/src/common/classes/FpeControl.h
@@ -121,6 +121,31 @@ private:
#endif
}
+#elif defined(__e2k__) && defined(_GNU_SOURCE)
+ static void maskAll() throw()
+ {
+ fedisableexcept(FE_ALL_EXCEPT);
+ }
+
+private:
+ typedef int Mask;
+ Mask savedMask;
+
+ static bool areExceptionsMasked(const Mask& m) throw()
+ {
+ return !(m & FE_ALL_EXCEPT);
+ }
+
+ static void getCurrentMask(Mask& m) throw()
+ {
+ m = fegetexcept();
+ }
+
+ void restoreMask() throw()
+ {
+ feenableexcept(savedMask);
+ }
+
#elif defined(HAVE_FEGETENV)
static void maskAll() throw()
{
diff --git a/src/common/common.h b/src/common/common.h
index 9fbe95410a..b77036f155 100644
--- a/src/common/common.h
+++ b/src/common/common.h
@@ -143,6 +143,11 @@
#define FB_CPU CpuRiscV64
#endif /* RISCV64 */
+#ifdef __e2k__
+/* let's pretend it's a regular x86_64 */
+#define FB_CPU CpuAmd
+#endif /* __e2k__ */
+
#ifdef sparc
#define FB_CPU CpuUltraSparc
#define RISC_ALIGNMENT